Weakness · Medium
CWE-1209: Failure to Disable Reserved Bits
What it is
The reserved bits in a hardware design are not disabled prior to production. Typically, reserved bits are used for future capabilities and should not support any functional logic in the design. However, designers might covertly use these bits to debug or further develop new capabilities in production hardware. Adversaries with access to these bits will write to them in hopes of compromising hardware state.
- Severity (our rating)
- Medium
- Likelihood of exploit
- Not rated by MITRE
- Introduced during
- Architecture and Design, Documentation, Implementation
- Exploited in the wild
- No CVE in CISA's catalog
In more detail
Reserved bits are labeled as such so they can be allocated for a later purpose. They are not to do anything in the current design. However, designers might want to use these bits to debug or control/configure a future capability to help minimize time to market (TTM). If the logic being controlled by these bits is still enabled in production, an adversary could use the logic to induce unwanted/unsupported behavior in the hardware.
What an attacker can do
- Varies by Context (Confidentiality, Integrity, Availability, Access Control, Accountability, Authentication, Authorization, Non-Repudiation)
How to prevent it
Architecture and Design
- Include a feature to disable reserved bits.
Integration
- Any writes to these reserve bits are blocked (e.g., ignored, access-protected, etc.), or an exception can be asserted.
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Start freeSource: MITRE Common Weakness Enumeration, CWE version 4.19.1. CWE is a trademark of The MITRE Corporation.